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| FDZ2554P July 2003 FDZ2554P Monolithic Common Drain P-Channel 2.5V Specified PowerTrench BGA MOSFET General Description Combining Fairchild's advanced 2.5V specified PowerTrench process with state-of-the-art BGA packaging, the FDZ2554P minimizes both PCB space and RDS(ON). This monolithic common drain BGA MOSFET embodies a breakthrough in packaging technology which enables the device to combine excellent thermal transfer characteristics, high current handling capability, ultra-low profile packaging, low gate charge, and low RDS(ON). Features * -6.5 A, -20 V. RDS(ON) = 28 m @ VGS = -4.5 V RDS(ON) = 45 m @ VGS = -2.5 V * Occupies only 0.10 cm2 of PCB area: 1/3 the area of SO-8 * Ultra-thin package: less than 0.90 mm height when mounted to PCB * Outstanding thermal transfer characteristics: significantly better than SO-8 * Ultra-low Qg x RDS(ON) figure-of-merit * High power and current handling capability Applications * Battery management * Load switch * Battery protection D D S S S D S S S Pin 1 S G S G Q2 G Q1 D Q2 S D S D Pin 1 D G Bottom Top TA=25oC unless otherwise noted Absolute Maximum Ratings VDSS VGSS ID Symbol PD TJ, TSTG Drain-Source Voltage Gate-Source Voltage Drain Current - Continuous (Note 1a) - Pulsed Power Dissipation (Steady State) (Note 1a) Operating and Storage Junction Temperature Range Parameter -20 12 -6.5 -20 2.1 -55 to +150 Ratings Thermal Characteristics RJA RJA RJC Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case (Note 1a) (Note 1b) (Note 1) 60 108 8 Package Marking and Ordering Information Device Marking 2554P Device FDZ2554P Reel Size 7'' Tape width 12mm (c)2003 Fairchild Semiconductor Corporation S Q1 F2554 S Units V V A W C C/W C/W C/W Quantity 3000 units FDZ2554P Rev. C3 (W) FDZ2554P Electrical Characteristics Symbol BVDSS BVDSS TJ IDSS IGSS VGS(th) VGS(th) TJ RDS(on) ID(on) gFS Ciss Coss Crss RG td(on) tr td(off) tf Qg Qgs Qgd IS VSD trr Qrr Notes: 1. TA = 25 unless otherwise noted C Parameter Drain-Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-Body Leakage (Note 2) Test Conditions VGS = 0 V, ID = -250 A ID = -250 A, Referenced to 25C VDS = -16 V, VGS = 12 V, VGS = 0 V VDS = 0 V Min Typ -20 -13 Max Units V mV/C Off Characteristics -1 100 -0.6 -0.8 3 21 36 30 -20 24 1430 319 164 -1.5 A nA V mV/C m A S pF pF pF On Characteristics Gate Threshold Voltage Gate Threshold Voltage Temperature Coefficient Static Drain-Source On-Resistance On-State Drain Current Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance VDS = VGS, ID = -250 A ID = -250 A, Referenced to 25C VGS = -4.5 V, ID = -6.5 A VGS = -2.5 V, ID = -5 A VGS = -4.5 V, ID = -6.5 A, TJ=125C VGS = -4.5 V, VDS = -5V VDS = -5 V, ID = -6.5 A VDS = -10 V, f = 1.0 MHz VGS = 15 mV, V GS = 0 V, 28 45 43 Dynamic Characteristics Gate Resistance (Note 2) f = 1.0 MHz ID = -1 A, RGEN = 6 9.2 12 9 62 37 22 18 100 60 20 Switching Characteristics Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge VDD = -10 V, VGS = -4.5 V, ns ns ns ns nC nC nC VDS = -10 V, VGS = -4.5 V ID = -6.5 A, 14 3 4 Drain-Source Diode Characteristics and Maximum Ratings Maximum Continuous Drain-Source Diode Forward Current Drain-Source Diode Forward VGS = 0 V,IS = -1.75 A Voltage Reverse Recovery Time IF = -6.5 A, diF/dt = 100 A/s Reverse Recovery Charge (Note 2) -0.7 25 20 -1.75 -1.2 A V ns nC top surface of the copper chip carrier. RJC and RJB are guaranteed by design while RJA is determined by the user' board design. s junction to the circuit board side of the solder ball, RJB, is defined for reference. For RJC, the thermal reference point for the case is defined as the RJA is determined with the device mounted on a 1 in 2 oz. copper pad on a 1.5 x 1.5 in. board of FR-4 material. The thermal resistance from the a) 60 C/W when mounted on a 1in2 pad of 2 oz copper b) 108 C/W when mounted on a minimum pad of 2 oz copper Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300s, Duty Cycle < 2.0% FDZ2554P Rev C3 (W) Dimensional Outline and Pad Layout FDZ2554P FDZ2554P BGA12AREVD FDZ2554P Rev C3 (W) FDZ2554P Typical Characteristics 20 -3.5V -ID, DRAIN CURRENT (A) 15 -2.5V -2.0V RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE VGS = - 4.5V 1.8 -3.0V 1.6 VGS = -2.5V -3.0V 1.2 -3.5V -4.0V 1 -4.5V 1.4 10 5 0 0 0.5 1 1.5 2 -VDS, DRAIN-SOURCE VOLTAGE (V) 0.8 0 5 10 -ID, DRAIN CURRENT (A) 15 20 Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. 0.09 1.4 RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE 1.3 1.2 1.1 1 0.9 0.8 -50 -25 0 25 50 75 100 o ID = -6.5A VGS = -4.5V RDS(ON), ON-RESISTANCE (OHM) ID = -3.2A 0.07 0.05 TA = 125 C o 0.03 TA = 25 C o 0.01 125 150 1.5 2 2.5 3 3.5 4 4.5 TJ, JUNCTION TEMPERATURE ( C) -VGS, GATE TO SOURCE VOLTAGE (V) Figure 3. On-Resistance Variation with Temperature. 20 VDS = -5V Figure 4. On-Resistance Variation with Gate-to-Source Voltage. 100 -IS, REVERSE DRAIN CURRENT (A) VGS = 0V 10 1 0.1 0.01 TA = 125oC 25oC -55oC -ID, DRAIN CURRENT (A) 15 10 TA = 125oC 5 -55oC 25oC 0.001 0 0.5 1 1.5 2 2.5 -VGS, GATE TO SOURCE VOLTAGE (V) 0.0001 0 0.2 0.4 0.6 0.8 1 1.2 -VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 5. Transfer Characteristics. Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature. FDZ2554P Rev C3 (W) FDZ2554P Typical Characteristics 5 -VGS, GATE-SOURCE VOLTAGE (V) 2000 ID = -6.5A VDS = -5V -10V -15V f = 1MHz VGS = 0 V 4 1600 CAPACITANCE (pF) Ciss 3 1200 2 800 Coss 1 400 Crss 0 4 8 Qg, GATE CHARGE (nC) 12 16 0 0 0 5 10 15 -VDS, DRAIN TO SOURCE VOLTAGE (V) 20 Figure 7. Gate Charge Characteristics. 100 P(pk), PEAK TRANSIENT POWER (W) Figure 8. Capacitance Characteristics. 50 RDS(ON) LIMIT 1ms 10ms 100ms -ID, DRAIN CURRENT (A) 10 40 SINGLE PULSE RJA = 108 C/W TA = 25 C 1 VGS = -4.5V SINGLE PULSE RJA = 108oC/W TA = 25oC 10s DC 1s 30 20 0.1 10 0.01 0.1 1 10 -VDS, DRAIN-SOURCE VOLTAGE (V) 100 0 0.01 0.1 1 10 100 1000 t1, TIME (sec) Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum Power Dissipation. r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE 1 D = 0.5 0.2 0.1 0.1 0.05 0.02 RJA(t) = r(t) * RJA RJA = 108 C/W P(pk) t1 0.01 SINGLE PULSE 0.01 t2 TJ - TA = P * RJA(t) Duty Cycle, D = t1 / t2 0.001 0.001 0.01 0.1 1 t1, TIME (sec) 10 100 1000 Figure 11. Transient Thermal Response Curve. Thermal characterization performed using the conditions described in Note 1b. Transient thermal response will change depending on the circuit board design. FDZ2554P Rev C3 (W) TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACExTM FACTTM ActiveArrayTM FACT Quiet SeriesTM BottomlessTM FAST CoolFETTM FASTrTM CROSSVOLTTM FRFETTM DOMETM GlobalOptoisolatorTM EcoSPARKTM GTOTM E2CMOSTM HiSeCTM EnSignaTM I2CTM Across the board. Around the world.TM The Power FranchiseTM Programmable Active DroopTM DISCLAIMER ImpliedDisconnectTM PACMANTM POPTM ISOPLANARTM Power247TM LittleFETTM PowerTrench MicroFETTM QFET MicroPakTM QSTM MICROWIRETM QT OptoelectronicsTM MSXTM Quiet SeriesTM MSXProTM RapidConfigureTM OCXTM RapidConnectTM OCXProTM SILENT SWITCHER OPTOLOGIC SMART STARTTM OPTOPLANARTM SPMTM StealthTM SuperSOTTM-3 SuperSOTTM-6 SuperSOTTM-8 SyncFETTM TinyLogic TruTranslationTM UHCTM UltraFET VCXTM FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component is any component of a life 1. Life support devices or systems are devices or support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design First Production Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Preliminary No Identification Needed Full Production Obsolete Not In Production Rev. I3 |
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